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1 ltc3772 3772f no current sense resistor required 40 a no-load quiescent current high output currents easily achieved internal soft-start ramps v out wide v in range: 2.75v to 9.8v low dropout: 100% duty cycle constant frequency 550khz operation low ripple burst mode operation at light load output voltage as low as 0.8v 1.5% voltage reference accuracy current mode operation for excellent line and load transient response only 8 a supply current in shutdown low profile 8-lead sot-23 (1mm) and (3mm 2mm) dfn (0.75mm) packages 1- or 2-cell li-ion battery-powered applications wireless devices portable computers distributed power systems 550khz micropower step-down dc/dc converter the ltc 3772 is a constant frequency current mode step-down dc/dc controller in a low profile 8-lead sot-23 (thinsot tm ) and a 3mm 2mm dfn package . the no r sense tm architecture eliminates the need for a current sense resistor, improving efficiency and saving board space. the ltc3772 automatically switches into burst mode operation at light loads to increase efficiency at low output current. it consumes only 40 a of quiescent current under a no-load condition. the ltc3772 incorporates an undervoltage lockout fea- ture that shuts down the device when the input voltage falls below 2v. to maximize the runtime from a battery source, the external p-channel mosfet is turned on continuously in dropout (100% duty cycle). high switch- ing frequency of 550khz allows the use of a small inductor and capacitors. an internal soft-start smoothly ramps the output voltage from zero to its regulation point. i th /run ltc3772 20k 82.5k 174k 22pf 680pf gnd v fb 3772 ta01 sw v in pgate 10 f 3.3 h v in 2.75v to 9.8v v out 2.5v 2a 47 f efficiency and power loss vs load current load current (ma) 60 efficiency (%) power loss (w) 80 100 50 70 90 1 100 1000 10000 3772 ta01b 40 0.01 1 10 0.1 0.001 10 v in = 3.3v v in = 3.3v figure 5 circuit v in = 5v v in = 5v features descriptio u applicatio s u typical applicatio u micropower no r sense constant frequency step-down dc/dc controller , ltc and lt are registered trademarks of linear technology corporation. burst mode is a registered trademark of linear technology corporation. thinsot and no r sense are trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
2 ltc3772 3772f order part number (note 1) input supply voltage (v in )........................ 0.3v to 10v iprg, pgate voltages ................ 0.3v to (v in + 0.3v) v fb , i th /run voltages ............................. 0.3v to 2.4v sw voltage ........... 2v to (v in + 1v) or 10v maximum pgate peak output current (<10 s) ........................ 1a ltc3772eddb t jmax = 125 c, ja = 76 c/w exposed pad (pin 9) is gnd must be soldered to pcb absolute m axi m u m ratings w ww u package/order i n for m atio n w u u consult ltc marketing for parts specified with wider operating temperature ranges. ddb8 part marking lbnr operating temperature range (note 2) .. 40 c to 85 c junction temperature (note 3) ............................ 125 c storage temperature range ................. 65 c to 125 c lead temperature (soldering, 10 sec) tsot-23 ........................................................... 300 c order part number ltc3772ets8 t jmax = 125 c, ja = 230 c/w ts8 part marking ltbnq i prg 1 i th /run 2 v fb 3 gnd 4 8 nc 7 sw 6 v in 5 pgate top view ts8 package 8-lead plastic tsot-23 top view 9 ddb package 8-lead (3mm 2mm) plastic dfn 5 6 7 8 4 3 2 1 gnd v fb i th /run i prg pgate v in sw nc parameter conditions min typ max units input voltage range 2.75 9.8 v input dc supply current (note 4) normal operation v ith /run = 1.3v 250 375 a sleep mode 40 60 a shutdown v ith /run = 0v 8 20 a uvlo v in < uvlo threshold ?100mv 1 5 a undervoltage lockout (uvlo) threshold v in rising 2.0 2.75 v v in falling 1.85 2.60 v start-up current source v ith /run = 0v 0.7 1.2 1.7 a shutdown threshold (at i th /run) v ith /run rising 0.3 0.6 0.95 v regulated feedback voltage 0 c t a 85 c (note 5) 0.788 0.800 0.812 v ?0 c t a 85 c (note 5) 0.780 0.800 0.812 v feedback voltage line regulation 2.75v v in 9.8v (note 5) 0.08 0.2 mv/v feedback voltage load regulation i th /run = 1.6v (note 5) 0.2 % i th /run = 1v (note 5) ?.2 % the indicates specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v in = 4.2v unless otherwise noted. (note 2) electrical characteristics
3 ltc3772 3772f v fb input current (note 5) ?0 2 10 na overvoltage protect threshold measured at v fb 0.850 0.880 0.910 v overvoltage protect hysteresis 40 mv oscillator frequency normal operation v fb = 0.8v 500 550 650 khz output short circuit v fb = 0v 200 khz gate drive rise time c load = 3000pf 40 ns gate drive fall time c load = 3000pf 40 ns peak current sense voltage i prg = gnd (note 6) 90 105 120 mv i prg = floating 160 175 190 mv i prg = v in 228 245 262 mv default soft-start time 0.6 ms parameter conditions min typ max units the indicates specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v in = 4.2v unless otherwise noted. (note 2) electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the ltc3772ets8/ltc3772eddb are guaranteed to meet specifications from 0 c to 70 c. specifications over the 40 c to 85 c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formula: t j = t a + (p d ? ja c/w) note 4: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. note 5: the ltc3772 are tested in a feedback loop that servos v fb to the output of the error amplifier while maintaining i th /run at the midpoint of the current limit range. note 6: peak current sense voltage is reduced dependent on duty cycle as given in figure 1. typical perfor a ce characteristics uw quiescent current (no load) vs input voltage input voltage (v) 2 quiescent current ( a) 40 50 10 3772 g01 30 20 4 6 8 3 5 7 9 60 35 45 25 55 temperature ( c) ?0 quiescent current ( a) 40 45 50 60 3772 g02 35 30 ?0 20 ?0 80 0 40 100 25 20 55 input voltage (v) 2 quiescent current ( a) 15 20 25 57 10 3772 g03 10 5 0 34 6 89 quiescent current (no load) vs temperature quiescent current (shutdown) vs input voltage
4 ltc3772 3772f typical perfor a ce characteristics uw quiescent current (shutdown) vs temperature shutdown threshold vs temperature regulated feedback voltage vs temperature temperature ( c) ?0 quiescent current ( a) 8 10 12 60 3772 g04 6 4 ?0 20 ?0 80 0 40 100 2 0 14 temperature ( c) ?0 400 v ith /run (mv) 500 600 700 800 30 10 10 30 3772 g05 50 70 90 v in = 4.2v temperature ( c) ?0 v fb (mv) 804 808 812 10 50 3772 g06 800 796 30 ?0 30 80 90 792 788 v in = 4.2v regulated feedback voltage vs input voltage oscillator frequency vs temperature oscillator frequency vs input voltage input voltage (v) 2 0.788 feedback voltage (v) 0.792 0.796 0.800 0.804 46 8 10 3772 g07 0.808 0.812 35 7 9 temperature ( c) ?0 500 f osc (khz) 510 530 540 550 600 570 ?0 30 50 3772 g08 520 580 590 560 ?0 10 70 90 v in = 4.2v v in (v) 2 540 f osc (khz) 545 550 555 560 3456 3772 g09 78910 t a = 25 c i th /run start-up current vs temperature temperature ( c) ?0 0.5 i th /run pull-up current ( a) 0.6 0.8 0.9 1.0 1.5 1.2 ?0 20 40 3772 fg10 0.7 1.3 1.4 1.1 ?0 0 60 80 100 i th /run = 0v i th /run start-up current vs input voltage input voltage (v) 0 i th /run pull-up current ( a) 1.1 1.3 1.5 6 10 3772 g11 0.9 0.7 0.5 24 8 1.7 1.9 2.1 i th /run = 0v undervoltage lockout thresholds vs temperature temperature ( c) ?0 1.5 input voltage (v) 1.6 1.8 1.9 2.0 2.5 2.2 ?0 20 40 3772 g12 1.7 2.3 2.4 2.1 ?0 0 60 80 100 rising falling
5 ltc3772 3772f typical perfor a ce characteristics uw maximum current sense threshold vs temperature soft-start time vs temperature foldback frequency vs temperature temperature ( c) ?0 0 maximum current sense threshold (mv) 50 100 150 200 ?0 20 60 100 3772 g13 250 300 ?0 0 40 80 i prg = v in i prg = float i prg = gnd temperature ( c) ?0 400 soft-start time ( s) 500 600 700 800 ?0 20 60 100 3772 g14 900 1000 ?0 0 40 80 temperature ( c) ?0 frequency (hz) 190 210 100 3772 g15 170 150 ?0 20 60 ?0 0 40 80 230 180 200 160 220 v fb = 0v efficiency vs load current efficiency vs load current load current (ma) 60 efficiency (%) 70 80 90 100 1 100 1000 10000 3772 g17 50 10 v out = 3.3v figure 5 circuit v out = 2.5v v out = 1.8v load step start-up v out 1v/div i th /run 1v/div i l 2a/div v in = 5v v out = 2.5v figure 5 circuit 500 s/div 3772 g18 v out 100mv/div ac coupled i load 2a/div i l 2a/div v in = 5v v out = 2.5v i load = 100ma to 1.5a figure 5 circuit 20 s/div 3772 g19 load current (ma) 70 efficiency (%) 80 90 95 1 100 1000 10000 3772 g16 60 10 85 75 65 v in = 3.3v v out = 2.5v figure 5 circuit v in = 5v v in = 7v v in = 4.2v
6 ltc3772 3772f uu u pi fu ctio s gnd (pin 1/pin 4): ground pin. v fb (pin 2/pin 3): receives the feedback voltage from an external resistor divider across the output. i th /run (pin 3/pin 2): this pin performs two functions. it serves as the error amplifier compensation point as well as the run control input. nominal voltage range for this pin is 0.7v to 1.9v. forcing this pin below 0.6v causes the device to be shut down. in shutdown, all functions are disabled and the pgate pin is held high. i prg (pin 4/pin 1): current sense limit pin. three-state pin selects maximum peak sense voltage threshold. the pin selects the maximum voltage drop across the external p-channel mosfet. tie to v in , gnd or float to select 245mv, 105mv or 175mv respectively. nc (pin 5/pin 8): no connection required. sw (pin 6/pin 7): switch node connection to inductor and current sense input pin. normally, the external p-channel mosfet? drain is connected to this pin. v in (pin 7/pin 6): supply and current sense input pin. this pin must be closely decoupled to gnd (pin 4). normally the external p-channel mosfet? source is connected to this pin. pgate (pin 8/pin 5): gate drive for the external p-channel mosfet. this pin swings from 0v to v in . exposed pad (pin 9, ddb only): the exposed pad is ground and must be soldered to the pcb for electrical connection and optimum thermal performance. (ddb/ts8)
7 ltc3772 3772f + + 0.15v sleep comparator 1.2v burst clamp shutdown comparator error amplifier overvoltage comparator short-circuit detect sleep shdn uv 1 a i th /run 0.225v 0.8v 0.88v 0v pgate i prg + soft-start ramp 550khz oscillator slope compensation current comparator undervoltage lockout switching logic and blanking circuit 0.3v + + + v in + voltage reference 0.8v i th buffer 75mv rs rs latch v in frequency foldback q v fb 3772 fd gnd sw i lim fu ctio al diagra u u w
8 ltc3772 3772f operatio u (refer to the functional diagram) main control loop (normal operation) the ltc3772 is a constant frequency current mode step- down switching regulator controller. during normal op- eration, the external p-channel mosfet is turned on each cycle when the oscillator sets the rs latch and turned off when the current comparator resets the latch. the peak inductor current at which the current comparator trips is controlled by the voltage on the i th /run pin, which is the output of the error amplifier. the negative input to the error amplifier is the output feedback voltage v fb , which is generated by an external resistor divider connected be- tween v out and ground. when the load current increases, it causes a slight decrease in v fb relative to the 0.8v reference, which in turn causes the i th /run voltage to increase until the average inductor current matches the new load current. the main control loop is shut down by pulling the i th /run pin to ground. releasing the i th /run pin allows an internal 1 a current source to charge up the external compensation network. when the i th /run pin voltage reaches approximately 0.6v, the main control loop is enabled and the i th /run voltage is pulled up by a clamp to its zero current level of approximately one diode voltage drop (0.7v). as the external compensation net- work continues to charge up, the corresponding peak inductor current level follows, allowing normal operation. the maximum peak inductor current attainable is set by a clamp on the i th /run pin at 1.2v above the zero current level (approximately 1.9v). burst mode operation the ltc3772 incorporates burst mode operation at low load currents (<10% of i max ). in this mode, an internal clamp sets the peak current of the inductor at a level cor- responding to an i th /run voltage 0.925v, even though the actual i th /run voltage is lower. when the inductor? av- erage current is greater than the load requirement, the voltage at the i th /run pin will drop. when the i th /run voltage falls to 0.85v, the sleep comparator will trip, turn- ing off the external mosfet. in sleep, the input dc supply current to the ic is reduced to 40 a from 250 a in normal operation. with the switch held off, average inductor cur- rent will decay to zero and the load will eventually cause the error amplifier output to start drifting higher. when the error amplifier output rises to 0.87v, the sleep comparator will untrip and normal operation will resume. the next oscilla- tor cycle will turn the external mosfet on and the switch- ing cycle will repeat. dropout operation when the input supply voltage decreases towards the output voltage, the rate of change of inductor current during the on cycle decreases. this reduction means that at some input-output differential, the external p-channel mosfet will remain on for more than one oscillator cycle (start dropping off-cycles) since the inductor current has not ramped up to the threshold set by the error amplifier. further reduction in input supply voltage will eventually cause the external p-channel mosfet to be turned on 100%; i.e., dc. the output voltage will then be determined by the input voltage minus the voltage drop across the sense resistor, the mosfet and the inductor. undervoltage lockout protection to prevent operation of the external p-channel mosfet with insufficient gate drive, an undervoltage lockout cir- cuit is incorporated into the ltc3772. when the input supply voltage drops below approximately 2v, the p-channel mosfet and all internal circuitry other than the undervoltage block itself are turned off. input supply current in undervoltage is approximately 1 a. short-circuit protection if the output is shorted to ground, the frequency of the oscillator is folded back from 550khz to approximately 200khz while maintaining the same minimum on time. this lower frequency allows the inductor current to safely discharge, thereby preventing current runaway. after the short is removed, the oscillator frequency will gradually increase back to 550khz as v fb rises through 0.3v on its way back to 0.8v.
9 ltc3772 3772f operatio u (refer to the functional diagram) overvoltage protection if v fb exceeds its regulation point of 0.8v by more than 10% for any reason, such as an output short-circuit to a higher voltage, the overvoltage comparator will hold the external p-channel mosfet off. this comparator has a typical hysteresis of 40mv. peak current sense voltage selection and slope compensation (i prg pins) when a controller is operating below 20% duty cycle, the peak current sense voltage (between the sense + and sw pins) allowed across the external p-channel mosfet is determined by: ? = v av v sense max ith () (.) ? 07 10 0 015 where a is a constant determined by the state of the i prg pins. floating the i prg pin selects a = 1.58; tying i prg to v in selects a = 2.2; tying i prg to sgnd selects a = 0.97. the maximum value of v ith is typically about 1.98v, so the maximum sense voltage allowed across the external p-channel mosfet is 175mv, 100mv or 250mv for the three respective states of the i prg pin. however, once the controller? duty cycle exceeds 20%, slope compensation begins and effectively reduces the peak sense voltage by a scale factor given by the curve in figure 1. the peak inductor current is determined by the peak sense voltage and the on-resistance of the external p-channel mosfet: i v r peak sense max ds on = ? () () soft-start the start-up of v out is controlled by the ltc3772 internal soft-start. during soft-start, the error amplifier eamp compares the feedback signal v fb to the internal soft-start ramp (instead of the 0.8v reference), which rises linearly from 0v to 0.8v in about 0.6ms. this allows the output voltage to rise smoothly from 0v to its final value, while maintaining control of the inductor current. after the soft-start is timed out, it is disabled until the part is put in shutdown again or the input supply is cycled. figure 1. reduction in sense voltage due to slope compensation vs duty cycle duty cycle (%) 10 sf = reduction in sense voltage (mv) 60 80 100 90 40 20 50 70 90 30 10 0 30 50 70 20 0 40 60 80 100 3772 f01
10 ltc3772 3772f the basic ltc3772 application circuit is shown on the front page of this data sheet. external component selection is driven by the load requirement and begins with the selec- tion of the power mosfet inductor and the output diode. these are selected followed by the input bypass capacitor c in and output bypass capacitor c out . power mosfet selection an external p-channel power mosfet must be selected for use with the ltc3772. the main selection criteria for the power mosfet are the threshold voltage v gs(th) and the ?n?resistance r ds(on) , reverse transfer capacitance c rss and total gate charge. since the ltc3772 is designed for operation down to low input voltages, a sublogic level threshold mosfet (r ds(on) guaranteed at v gs = 2.5v) is required for applications that work close to this voltage. when these mosfets are used, make sure that the input supply to the ltc3772 is less than the absolute maximum v gs rating. the p-channel mosfet? on-resistance is chosen based on the required load current. the maximum average output load current i out(max) is equal to the peak inductor current minus half the peak-to-peak ripple current i ripple . the ltc3772? current comparator monitors the drain-to- source voltage v ds of the p-channel mosfet, which is sensed between the v in and sw pins. the peak inductor current is limited by the current threshold, set by the volt- age on the i th pin of the current comparator. the voltage on the i th pin is internally clamped, which limits the maxi- mum current sense threshold ? v sense(max) to approxi- mately 175mv when i prg is floating (100mv when i prg is tied low; 250mv when i prg is tied high). the output current that the ltc3772 can provide is given by: i v r i out max sense max ds on ripple () () () = ? 2 a reasonable starting point is setting ripple current i ripple to be 40% of i out(max) . rearranging the above equation yields: r v i ds on max sense max out max ()( ) () () = ? 5 6 for duty cycle < 20%. however, for operation above 20% duty cycle, slope com- pensation has to be taken into consideration to select the appropriate value of r ds(on) to provide the required amount of load current: r vsf i ds on max sense max out max ()( ) () () = ? 5 6 where sf is a factor whose value is obtained from the curve in figure 1. these must be further derated to take into account the significant variation in on-resistance with temperature. the following equation is a good guide for determining the required r ds(on)max at 25 c (manufacturer? specifica- tion), allowing some margin for variations in the ltc3772 and external component values: r vsf i ds on max sense max out max t ()( ) () () ? = ? 5 6 09 the t is a normalizing term accounting for the tempera- ture variation in on-resistance, which is typically about 0.4%/ c, as shown in figure 2. junction to case tempera- ture t jc is about 10 c in most applications. for a maximum ambient temperature of 70 c, using 80 c ~ 1.3 in the above equation is a reasonable choice. the required minimum r ds(on) of the mosfet is also governed by its allowable power dissipation. for applica- tions that may operate the ltc3772 in dropout?.e., 100% applicatio s i for atio wu uu figure 2. r ds(on) vs temperature junction temperature ( ? c) ?0 t normalized on resistance 1.0 1.5 150 0.5 0 0 50 100 2.0 3772 f02
11 ltc3772 3772f applicatio s i for atio wu uu inductor core selection once the inductance value is determined, the type of induc- tor must be selected. actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. as inductance increases, core losses go down. unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. ferrite designs have very low core loss and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. ferrite core material saturates ?ard,?which means that inductance collapses abruptly when the peak design cur- rent is exceeded. this results in an abrupt increase in in- ductor ripple current and consequent output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and don? radiate much energy, but generally cost more than powdered iron core inductors with similar characteristics. the choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/emi requirements. new designs for surface mount inductors are available from coiltronics, coilcraft, toko and sumida. output diode selection the catch diode carries load current during the off-time. the average diode current is therefore dependent on the p-channel switch duty cycle. at high input voltages the diode conducts most of the time. as v in approaches v out the diode conducts only a small fraction of the time. the most stressful condition for the diode is when the output is short- circuited. under this condition the diode must safely handle i peak at close to 100% duty cycle. therefore, it is impor- tant to adequately specify the diode peak current and av- erage power dissipation so as not to exceed the diode ratings. duty cycle?t its worst case the required r ds(on) is given by: r p i ds on dc p out max p ()( %) () ()() = = + 100 2 1 where p p is the allowable power dissipation and p is the temperature dependency of r ds(on) . (1 + p ) is generally given for a mosfet in the form of a normalized r ds(on) vs temperature curve, but p = 0.005/ c can be used as an approximation for low voltage mosfets. in applications where the maximum duty cycle is less than 100% and the ltc3772 is in continuous mode, the r ds(on) is governed by: r p dc i ds on p out p () () ( ) ? + 2 1 where dc is the maximum operating duty cycle of the ltc3772. inductor value calculation the operating frequency and inductor selection are inter- related in that higher operating frequencies permit the use of a smaller inductor for the same amount of inductor ripple current. however, this is at the expense of efficiency due to an increase in mosfet gate charge losses. the inductance value also has a direct effect on ripple current. the ripple current, i ripple , decreases with higher inductance or frequency and increases with higher v in or v out . the inductor? peak-to-peak ripple current is given by: i vv fl vv vv ripple in out out d in d = ? + + ? ? ? ? ? ? () where f is the operating frequency. accepting larger values of i ripple allows the use of low inductances, but results in higher output voltage ripple and greater core losses. a reasonable starting point for setting ripple current is i ripple = 0.4(i out(max) ). remember, the maximum i ripple occurs at the maximum input voltage.
12 ltc3772 3772f applicatio s i for atio wu uu under normal load conditions, the average current con- ducted by the diode is: i vv vv i d in out in d out = ? + ? ? ? ? ? ? the allowable forward voltage drop in the diode is calcu- lated from the maximum short-circuit current as: v p i f d sc max () where p d is the allowable power dissipation and will be determined by efficiency and/or thermal requirements. a fast switching diode must also be used to optimize effi- ciency. schottky diodes are a good choice for low forward drop and fast switching times. remember to keep lead length short and observe proper grounding to avoid ring- ing and increased dissipation. an additional consideration in applications where low no- load quiescent current is critical is the reverse leakage current of the diode at the regulated output voltage. a leak- age greater than several microamperes can represent a significant percentage of the total input current. c in and c out selection the input capacitance, c in , is needed to filter the trapezoi- dal current at the source of the top mosfet. to prevent large ripple voltage, a low esr input capacitor sized for the maximum rms current should be used. rms current is given by: ii v v v v rms out max out in in out = () ? this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capaci- tor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. the output filtering capacitor c smooths out current flow from the inductor to the load, help maintain a steady out- put voltage during transient load changes and reduce output voltage ripple. the capacitors must be selected with suf- ficiently low esr to minimize voltage ripple and load step transients and sufficiently bulk capacitance to ensure the control loop stability. the output ripple, ? v out , is determined by: ?? v i esr fc out l out + ? ? ? ? ? ? 1 8 the output ripple is highest at maximum input voltage since dil increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms cur- rent handling requirements. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all avail- able in surface mount packages. special polymer capaci- tors offer very low esr but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power sup- plies. aluminum electrolytic capacitors have significantly higher esr but can be used in cost-sensitive applications provided that consideration is given to ripple current rat- ings and long term reliability. ceramic capacitors have excellent low esr characteristics but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to significant ringing. using ceramic input and output capacitors higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at the input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mis- taken as loop instability. at worst, a sudden inrush of cur- rent through the long wires can potentially cause a voltage spike at v in large enough to damage the part.
13 ltc3772 3772f applicatio s i for atio wu uu for ceramic capacitor, use x7r or x5r types, do not use y5v. the choices include murata grm series, tdk c2012 and taiyo-yuden jmk series. setting output voltage the ltc3772 output voltages are each set by an external feedback resistor divider carefully placed across the out- put as shown in figure 3. the regulated output voltage is determined by: vv r r out b a =+ ? ? ? ? ? ? 08 1 . to improve the frequency response, a feed-forward capaci- tor, c ff , may be used. great care should be taken to route the v fb line away from noise sources, such as the inductor or the sw line. figure 3. setting output voltage 3 v fb v out ltc3772 r a 3772 f03 r b c ff 1. the v in current is the dc supply current, given in the electrical characteristics, that excludes mosfet driver and control currents. v in current results in a small loss which increases with v in . 2. mosfet gate charge current results from switching the gate capacitance of the power mosfet. each time a mosfet gate is switched from low to high to low again, a packet of charge dq moves from v in to ground. the resulting dq/dt is a current out of v in that is typically much larger than the dc supply current. in continuous mode, i gatechg = (f)(dq). 3. i 2 r losses are predicted from the dc resistances of the mosfet, inductor and current shunt. in continuous mode the average output current flows through l but is ?hopped?between the p-channel mosfet (in series with r sense ) and the output diode. the mosfet r ds(on) plus r sense multiplied by duty cycle can be summed with the resistances of l and r sense to obtain i 2 r losses. 4. the output diode is a major source of power loss at high currents and gets worse at high input voltages. the diode loss is calculated by multiplying the forward voltage times the diode duty cycle multiplied by the load current. for example, assuming a duty cycle of 50% with a schot- tky diode forward voltage drop of 0.4v, the loss increases from 0.5% to 8% as the load current increases from 0.5a to 2a. 5. transition losses apply to the external mosfet and increase at higher operating frequencies and input volt- ages. transition losses can be estimated from: transition loss = 2(v in ) 2 i o(max) c rss (f) other losses including c in and c out esr dissipative losses, and inductor core losses, generally account for less than 2% total additional loss. foldback current limiting as described in the output diode selection, the worst-case dissipation occurs with a short-circuited output when the diode conducts the current limit value almost continuously. efficiency considerations the efficiency of a switching regulator is equal to the out- put power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. efficiency can be expressed as: efficiency = 100% ?( 1 + 2 + 3 + ...) where 1, 2, etc. are the individual losses as a percent- age of input power. although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in ltc3772 circuits: 1) ltc3772 dc bias current, 2) mosfet gate charge current, 3) i 2 r losses and 4) volt- age drop of the output diode.
14 ltc3772 3772f applicatio s i for atio wu uu to prevent excessive heating in the diode, foldback current limiting can be added to reduce the current in proportion to the severity of the fault. foldback current limiting is implemented by adding diodes d fb1 and d fb2 between the output and the i th /run pin as shown in figure 4. in a hard short (v out = 0v), the current will be reduced to approximately 50% of the maximum output current. figure 4. foldback current limiting v fb i th /run v out ltc3772 r a 3772 f04 r b d fb1 d fb2 and values determine the loop feedback factor gain and phase. an output current pulse of 20% to 100% of full load current having a rise time of 1 s to 10 s will produce output voltage and i th pin waveforms that will give a sense of the overall loop stability. the gain of the loop will be increased by increasing r c , and the bandwidth of the loop will be increased by decreasing c c . the output voltage settling behavior is related to the stability of the closed- loop system and will demonstrate the actual overall supply performance. for a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to application note 76. a second, more severe transient is caused by switching in loads with large (>1 f) supply bypass capacitors. the discharged bypass capacitors are effectively put in parallel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. the only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25)(c load ). thus a 10 f capacitor would require a 250 s rise time, limiting the charging current to about 200ma. minimum on-time considerations minimum on-time, t on(min) , is the smallest amount of time that the ltc3772 is capable of turning the top mosfet on and then off. it is determined by internal timing delays and the gate charge required to turn on the top mosfet. the minimum on-time for the ltc3772 is about 250ns. low duty cycle and high frequency applica- tions may approach this minimum on-time limit and care should be taken to ensure that: t v fv on min out in () < if the duty cycle falls below what can be accommodated by the minimum on-time, the ltc3772 will begin to skip cycles. the output voltage will continue to be regulated, but the ripple current and ripple voltage will increase. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to ( ? i load )(esr), where esr is the effective series resistance of cout . ? i load also begins to charge or dis- charge c out , which generates a feedback error signal. the regulator loop then returns v out to its steady-state value. during this recovery time, v out can be monitored for over- shoot or ringing. opti-loop compensation allows the transient response to be optimized over a wide range of output capacitance and esr values. the i th series r c -c c filter (see functional diagram) sets the dominant pole-zero loop compensation. the i th exter- nal components shown in the figure 5 circuit will provide an adequate starting point for most applications. the values can be modified slightly (from 0.2 to 5 times their suggested values) to optimize transient response once the final pc layout is done and the particular output capacitor type and value have been determined. the output capaci- tors need to be decided upon because the various types
15 ltc3772 3772f 550khz micropower, 1a, 2-cell li-ion to 3.3v out step-down dc/dc converter typical applicatio s u i th /run ltc3772 15k 56.2k 174k ups120 l1: sumida cr43-4r7 22pf 100pf gnd v fb 3772 ta02a sw v in pgate 22 f si2341ds l1 4.7 h v in 5v to 8.4v v out 3.3v 1a 47 f i prg efficiency vs load current start-up load step load current (ma) 60 efficiency (%) 80 100 50 70 90 1 100 1000 10000 3772 ta02b 40 10 v in = 5.5v v in = 8.4v v in = 7.2v v out = 3.3v v out 2v/div i th /run 1v/div i l 1a/div v in = 5.5v v out = 3.3v r load = 3 ? 500 s/div 3772 ta02c v out 100mv/div ac coupled i load 500ma/div i l 500ma/div v in = 5.5v v out = 3.3v i load = 40ma to 500ma 20 s/div 3772 ta02d
16 ltc3772 3772f 550khz micropower 4a step-down dc/dc converter typical applicatio s u i th /run ltc3772 24.9k 82.5k 174k b320a l1: vishay ihlp-2525cz-01 22pf 470pf gnd v fb 3772 ta03a sw v in pgate 22 f ntms5po2r2 l1 2.2 h v in 2.75v to 9.8v v out 2.5v 4a 47 f i prg load current (ma) 60 75 70 65 100 95 90 85 80 3772 ta03b efficiency (%) 100 10000 1000 v in = 3.3v v in = 5v efficiency vs load current start-up v out 2v/div i th /run 1v/div i l 1a/div v in = 5v v out = 2.5v r load = 3 ? 500 s/div 3772 ta03c load step v out 200mv/div ac coupled i load 2a/div i l 2a/div v in = 5v v out = 2.5v 20 s/div 3772 ta03d
17 ltc3772 3772f 550khz micropower 5v in to 1.8v out at 8a dc/dc converter typical applicatio s u i th /run ltc3772 15k 140k 174k 22pf 470pf gnd v fb 3772 ta04a sw v in pgate 22 f si9803 2 l1 1 h v in 5v v out 1.8v 8a 100 f 2 i prg v in
18 ltc3772 3772f ddb package 8-lead plastic dfn (3mm 2mm) (reference ltc dwg # 05-08-1702) 2.00 0.10 (2 sides) note: 1. drawing conforms to version (wecd-1) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 0.10 bottom view?xposed pad 0.56 0.05 (2 sides) 0.75 0.05 r = 0.115 typ 2.15 0.05 (2 sides) 3.00 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0 ?0.05 (ddb8) dfn 1103 0.25 0.05 2.20 0.05 (2 sides) recommended solder pad pitch and dimensions 0.61 0.05 (2 sides) 1.15 0.05 0.675 0.05 2.50 0.05 package outline 0.25 0.05 0.50 bsc pin 1 chamfer of exposed pad 0.50 bsc u package descriptio
19 ltc3772 3772f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. u package descriptio 1.50 ?1.75 (note 4) 2.80 bsc 0.22 ?0.36 8 plcs (note 3) datum ? 0.09 ?0.20 (note 3) ts8 tsot-23 0802 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 ?0.90 1.00 max 0.01 ?0.10 0.20 bsc 0.30 ?0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.52 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637)
20 ltc3772 3772f part number description comments ltc1624 high efficiency so-8 n-channel switching regulator controller n-channel drive, 3.5v v in 36v ltc1625 no r sense tm synchronous step-down regulator 97% efficiency, no sense resistor lt 1765 25v, 2.75a (i out ), 1.25mhz step-down converter 3v v in 25v, v out 1.2v, so-8 and tssop16 packages ltc1771 ultra-low supply current step-down dc/dc controller 10 a supply current, 93% efficiency, 1.23v v out 18v; 2.8v v in 20v ltc1772/ltc1772b 550khz thinsot step-down dc/dc controllers 2.5v v in 9.8v, v out 0.8v, i out 6a ltc1778/ltc1778-1 no r sense current mode synchronous step-down controllers 4v v in 36v, 0.8v v out (0.9)(v in ), i out up to 20a ltc1872/ltc1872b 550khz thinsot step-up dc/dc controllers 2.5v v in 9.8v; 90% efficiency ltc3411/ltc3412 1.25/2.5a monolithic synchronous step-down converter 95% efficiency, 2.5v v in 5.5v, v out 0.8v, tssop16 exposed pad package ltc3440 600ma (i out ), 2mhz synchronous buck-boost dc/dc converter 2.5v v in 5.5v, single inductor ltc3736 dual, 2-phase, no r sense synchronous controller v in : 2.75v to 9.8v, i out up to 5a, 4mm 4mm qfn with output tracking package ltc3736-1 dual, 2-phase, no r sense synchronous controller v in : 2.75v to 9.8v, spread spectrum operation, output with spread spectrum voltage tracking, 4mm 4mm qfn package ltc3737 dual, 2-phase, no r sense controller with output tracking v in : 2.75v to 9.8v, i out up to 5a, 4mm 4mm qfn package ltc3776 dual, 2-phase, no r sense synchronous controller for provides v ddq and v tt with one ic, 2.75v v in 9.8v, ddr/qdr memory termination adjustable constant frequency with pll up to 850khz, spread spectrum operation, 4mm 4mm qfn and 16-lead ssop packages ltc3808 no r sense , low emi, synchronous step-down controller with 2.75v v in 9.8v, spread spectrum operation, output tracking 3mm 4mm dfn and 16-lead ssop packages ? linear technology corporation 2005 lt/tp 0305 500 ?printed in the usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com related parts u typical applicatio figure 5. 550khz micropower step-down dc/dc converter i th /run ltc3772 20k 82.5k 174k 680pf gnd i prg v fb 3772 f05 sw v in pgate 10 f 22pf l1: toko d53lca915at-3r3m v in 3v to 8v v out 2.5v 2a 47 f b220a l1 3.3 h fdc638p

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